[Re: RAM question]

[Tim Schmidt]

Nvidia's NForce chipset for Athlons and Durons employs a sort of L3 cache 
refered to as the 'DASP'.  Details are sketchy at best (we do not know the 
size of the DASP's cache), but it is known that the DASP operates by 
guessing what information the CPU will need next and loading it into a small 
cache before the CPU requests it -- those of you in the know will recognise 
this as hardware prefetching and realize that the newer 'morgan' core durons 
and 'palomino' core athlons (in other words: durons 1000Mhz and above, 
Athlon 4's, Athlon MPs, and Athlon XPs) contain this function right on the 
CPU...  So we should be able to get an idea of how well the DASP performs by 
testing it with a 'thunderbird' and 'palomino' core athlon of the same 
speed.  I've seen it done (toms hardware I think) and they reported about a 
5% difference in speed.  Great news if you want to run a thunderbird in an 
nforce, ho-hum if you already own a palomino.

--tim


>From: Matt Graham <danceswithcrows@usa.net>
>To: linux-user@egr.msu.edu
>Subject: Re: [Re: RAM question]
>Date: 16 Nov 2001 16:46:20 EST
>
>Ben Pfaff <blp@cs.stanford.edu> wrote:
>
> > Do typical modern motherboards have a cache?  I didn't realize
> > that there was another level of caching beyond the 512 kB or so
> > on the chip.
>
>The last x86 motherboards that had L2 cache on them that I'm aware of were 
>the
>Super 7 ones (since not all the K6-?s had L2 cache on-chip, it had to go
>*somewhere* in those boards.)  The problem that Ed/Jo were referring to 
>arose
>because of other design flaws, namely that the processor and/or chipset 
>didn't
>always know which pages of main memory were in the processor's caches.  
>This
>information was stored in the "cache tag RAM", a small block of RAM on the
>motherboard that was (usually) not upgradable.
>
>Pages of main memory were mapped to this cache tag RAM in a fixed way,
>designed to minimize performance problems under DOS/Doze if someone put 
>more
>RAM in the board than the cache tag RAM could handle.  If you had a small
>block of cache tag RAM, only 64M could get cached, and it would be the 
>"lower"
>64M if you had, say, 80M.  Since Linux puts the frequently-accessed kernel
>data structures at "high" physical addresses, these structures would never 
>be
>cached, making Linux very slow in these circumstances.  (DOS and its
>descendants apparently fill system RAM from the "bottom" up, so the 
>important
>kernel qoutines and structs would always be cacheable in DOS on one of 
>these
>boards.)
>
>Information stolen from Scott Mueller's _Upgrading and Repairing PCs_, 11th
>Edition, as well as some HOWTOs that I've forgotten the names of.  
>Corrections
>welcome as it's been many months since I've had to remember this garbage.
>
>--
>Matt G / Dances With Crows
>There is no Darkness in Eternity/But only Light too dim for us to see
>"I backed up my brain to tape, but tar says the tape contains no data...."
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